28 #include "sidplayfp/event.h"
29 #include "sidplayfp/sidendian.h"
30 #include "sidplayfp/sidmemory.h"
32 #include "Banks/Bank.h"
33 #include "Banks/SystemRAMBank.h"
34 #include "Banks/SystemROMBanks.h"
35 #include "Banks/ZeroRAMBank.h"
48 bool loram, hiram, charen;
54 Bank* cpuWriteMap[16];
75 void setCpuPort(
int state);
76 void updateMappingPHI2();
77 uint8_t getLastReadByte()
const {
return 0; }
78 event_clock_t getPhi2Time()
const {
return context.
getTime(EVENT_CLOCK_PHI2); }
86 void setRoms(
const uint8_t* kernal,
const uint8_t* basic,
const uint8_t* character)
88 kernalRomBank.set(kernal);
89 basicRomBank.set(basic);
90 characterRomBank.
set(character);
95 uint_least16_t
readMemWord(uint_least16_t addr) {
return endian_little16(ramBank.ram+addr); }
98 void writeMemWord(uint_least16_t addr, uint_least16_t value) { endian_little16(ramBank.ram+addr, value); }
100 void fillRam(uint_least16_t start, uint8_t value,
unsigned int size)
102 memset(ramBank.ram+start, value, size);
104 void fillRam(uint_least16_t start,
const uint8_t* source,
unsigned int size)
106 memcpy(ramBank.ram+start, source, size);
122 uint8_t
cpuRead(uint_least16_t addr)
const {
return cpuReadMap[addr >> 12]->
peek(addr); }
130 void cpuWrite(uint_least16_t addr, uint8_t data) { cpuWriteMap[addr >> 12]->
poke(addr, data); }