29 #include "Banks/IOBank.h"
30 #include "Banks/ColorRAMBank.h"
31 #include "Banks/DisconnectedBusBank.h"
32 #include "Banks/SidBank.h"
33 #include "Banks/ExtraSidBank.h"
35 #include "sidplayfp/EventScheduler.h"
37 #include "sidplayfp/c64/c64env.h"
38 #include "sidplayfp/c64/c64cpu.h"
39 #include "sidplayfp/c64/c64cia.h"
40 #include "sidplayfp/c64/c64vic.h"
41 #include "sidplayfp/c64/mmu.h"
56 virtual void load(
const char *) =0;
134 static double getCpuFreq(
model_t model);
143 uint8_t cpuRead(uint_least16_t addr) {
return mmu.
cpuRead(addr); }
151 void cpuWrite(uint_least16_t addr, uint8_t data) { mmu.
cpuWrite(addr, data); }
160 inline void interruptIRQ(
bool state);
167 inline void interruptNMI() { cpu.
triggerNMI (); }
172 inline void interruptRST() { cpu.
triggerRST (); }
181 inline void setBA(
bool state);
183 inline void lightpen() { vic.lightpen (); }
185 #ifdef PC64_TESTSUITE
188 void loadFile(
const char *file)
200 #ifdef PC64_TESTSUITE
201 void setTestEnv(testEnv *env)
217 void debug(
bool enable, FILE *out) { cpu.debug(enable, out); }
220 void resetCpu() { cpu.
reset(); }
227 void setRoms(
const uint8_t* kernal,
const uint8_t* basic,
const uint8_t* character)
229 mmu.setRoms(kernal, basic, character);
267 sidmemory *getMemInterface() {
return &mmu; }
269 uint_least16_t getCia1TimerA()
const {
return cia1.getTimerA(); }
272 void c64::interruptIRQ(
bool state)
289 void c64::setBA(
bool state)
292 if (state == oldBAState)